The Tandy 1000 - The best MS-DOS computer in 1984.
Support this channel on Patreon: https://www.patreon.com/8BitGuy1 Visit my website: http://www.the8bitguy.com/
The 8-Bit Guy
LMARV-1 (Tangible RISC-V) Part 3: Designing the ALU
I design the Arithmetic Logic Unit for the RISC-V processor. Pleasantly, it turns out to be fast and cheap! VAX-11/730 CPU Technical Manual: ...
Robert Baruch
CS-224 Computer Organization Lecture 01
Lecture 1 (2010-01-29) Introduction CS-224 Computer Organization William Sawyer 2009-2010- Spring Instruction set architecture (ISA), ISA design ...
Bilkent Online Courses
How a datapath works inside a computer system
Description of how a datapath works inside a computer system. The video describes an example of datapath containing a bank of registers and an ALU and ...
Abelardo Pardo
The Rise of GPU Computing (+ What is Volta, Titan V, RTX, ...)
Visit Our Parent Company EarthOne For Sustainable Living Made Simple ➤ https://earthone.io/ This video is the sixth in a multi-part series discussing computing.
Futurology
Lecture - 6 Data Path Architecture
Lecture Series on Computer Organization by Prof.S. Raman, Department of Computer Science and Engineering, IIT Madras. For More details on NPTEL visit ...
nptelhrd
Registers and RAM: Crash Course Computer Science #6
Take the 2017 PBS Digital Studios Survey: http://surveymonkey.com/r/pbsds2017. Today we're going to create memory! Using the basic logic gates we ...
CrashCourse
Input/Output architectures
A description of four input/output architectures used in modern microprocessors: polling, interruptions, DMA and Channel IO.
Abelardo Pardo
Analog Supercomputers: From Quantum Atom to Living Body | Rahul Sarpeshkar | TEDxDartmouth
Rahul Sarpeshkar discusses how analog computation can take us back to the future and help us create powerful supercomputers that shift us from the current ...
TEDx Talks
Lecture - 22 Processor Design Micro programmed Control
Lecture Series on Computer Architecture by Prof. Anshul Kumar, Department of Computer Science & Engineering ,IIT Delhi. For more details on NPTEL visit ...
nptelhrd
Design Your Own CPU!!!
Thanks to SiFive for sponsoring this video! Check our their core designer at https://www.sifive.com/core-designer We get a look at some working Open Source ...
Linus Tech Tips
Operating Systems: Crash Course Computer Science #18
Get 10% off a custom domain and email address by going to https://www.hover.com/CrashCourse. So as you may have noticed from last episode, computers ...
CrashCourse
8-bit CPU control logic: Part 1
In this video, we walk through writing a program—using a machine language we get to make up! Then we walk through exactly what the control logic will need to ...
Ben Eater
Lecture - 38 Concluding Remarks
Lecture Series on Computer Architecture by Prof. Anshul Kumar, Department of Computer Science & Engineering ,IIT Delhi. For more details on NPTEL visit ...
nptelhrd
New Golden Age for Computer Architectures | Dave Patterson (UC Berkeley)
Keynote from Spark + AI Summit 2019 About: Databricks provides a unified data analytics platform, powered by Apache Spark™, that accelerates innovation by ...
Databricks
Computer Architecture
Chair: David Patterson Panel: Frederick P. Brooks, Jr., Ivan Sutherland, Charles P. (Chuck) Thacker Abstract: Sixty-five years ago, Alan Turing produced a ...
Association for Computing Machinery (ACM)
Lessons in Game Design, lecture by Will Wright
[Recorded November 20, 2003] Will Wright has become one of the most successful designers of interactive entertainment in the world. He began working on ...
Computer History Museum
accumulator design in computer architecture | COA
computer architecture you would learn design of accumulator.
Education 4u
An Overview of the Alpha AXP 21164 Micro-Architecture, lecture by John Edmonson
An Overview of the Alpha AXP 21164 Micro-Architecture, a lecture by John Edmonson. This video was recorded in August 1994. From University Video ...
Computer History Museum
DriveNets Network Operating System DNOS Architecture
DriveNets Network Cloud architecture follows a disaggregated model with the cloud-native software disaggregated from the hardware on which it runs, ...
Tech Field Day
A tour of the ARM architecture and its Linux support
Thomas Petazzoni http://linux.conf.au/schedule/presentation/67/ From mobile devices to industrial equipment, and with the rise of IoT, computing systems based ...
linux conf au 2017 - Hobart, Australia
CS-224 Computer Organization Lecture 02
Lecture 2 (2010-01-29) Introduction (cont'd) CS-224 Computer Organization William Sawyer 2009-2010- Spring Instruction set architecture (ISA), ISA design ...
Bilkent Online Courses
Lecture - 24 Pipelined Processor Design Basic Idea
Lecture Series on Computer Architecture by Prof. Anshul Kumar, Department of Computer Science & Engineering ,IIT Delhi. For more details on NPTEL visit ...
nptelhrd
Mod-05 Lec-34 Complex PLDs
Digital System design with PLDs and FPGAs by Prof. Kuruvilla Varghese,Department of Electronics & Communication Engineering,IISc Bangalore.For more ...
nptelhrd
AWS re:Invent 2019: [REPEAT 1] Security benefits of the Nitro architecture (SEC408-R1)
The AWS Nitro architecture is fundamental to the Amazon EC2 service. With Nitro, each host in the core compute platform is built with trusted computers that ...
AWS Events
Digital Circuits - Lecture 24: Systolic Arrays and Beyond (ETH Zurich, Spring 2017)
Lecture 24: Systolic Arrays and Beyond Lecturer: Prof. Onur Mutlu (http://people.inf.ethz.ch/omutlu/) Date: May 26, 2017. Course webpage: ...
Onur Mutlu Lectures
The Apollo Guidance Computer, Part One: Eldon Hall
Recorded June 10, 1982 This is a two-part talk that chronicles the design of the Apollo Guidance Computer (AGC), the custom-made space borne navigation ...
Computer History Museum
February 2016 Webinar Series - Architectural Patterns for Big Data on AWS
With an ever-increasing set of technologies to process big data, organizations often struggle to understand how to build scalable and cost-effective big data ...
AWS Online Tech Talks
Computing and Computers - Mainframes and Micros Unite - BBC 2 - 1983
M252 - Mainframes and Micros Unite Discusses the uses of micro computers in business where the requirements and complexity do not justify the cost of a ...
The Centre for Computing History
Lecture -7 Architecture Space
Lecture Series on Computer Architecture by Prof. Anshul Kumar, Department of Computer Science & Engineering ,IIT Delhi. For more details on NPTEL visit ...
nptelhrd
MICRO-PROGRAMMED CONTROL UNIT | ARCHITECTURE
In this video, we have discussed the Microprogrammed control Unit architecture. Microprogrammed computers are characterized by the fact that the control ...
Engineering and Technology 4 U
Performance: SIMD, Vectorization and Performance Tuning | James Reinders, former Intel Director
Presented at the Argonne Training Program on Extreme-Scale Computing, Summer 2016. Slides for this presentation are available here: ...
ANL Training
Computer Architecture - Lecture 17: GPU Programming (ETH Zürich, Fall 2019)
Computer Architecture, ETH Zürich, Fall 2019 (https://safari.ethz.ch/architecture/fall2019/doku.php) Lecture 17: GPU Programming Lecturer: Dr. Juan Gomez ...
Onur Mutlu Lectures
2017 ASEE faculty workshop on SoC Design using Arm Cortex-M0
The workshop, presented by Professor Victor Nelson, Auburn University, USA, touches on key considerations for SoC design.
Arm
Start reverse engineering AVR - Memory Map and I/O Registers - rhme2 Reverse Engineering
We are looking at the datasheet of the ATmega328p and learn about harvard architecture and how serial communication on an assembler level looks like.
LiveOverflow
Lecture - 33 Input / Output Subsystem: Introduction
Lecture Series on Computer Architecture by Prof. Anshul Kumar, Department of Computer Science & Engineering ,IIT Delhi. For more details on NPTEL visit ...
nptelhrd
RISC-V Projects in India - 1st RISC-V Workshop
Neel Gala (IIT-Madras, India) January 14, 2015.
RISC-V International
Design of Digital Circuits - Lecture 12: Microarchitecture II (ETH Zürich, Spring 2019)
Design of Digital Circuits, ETH Zürich, Spring 2019 (https://safari.ethz.ch/digitaltechnik/spring2019) Professor Onur Mutlu (http://people.inf.ethz.ch/omutlu) ...
Onur Mutlu Lectures
Cache Coherent Memory Fabric based on RISC-V - RISC-V Bay Area Meetup, April 20, 2020
With RISC-V being an open ISA, this has enabled many open system architectural capabilities. One of these is the cache coherent Tilelink bus. Based on Tilelink ...
RISC-V International
HC30-S1: Mobile/Power Efficient Processors
Session 1, Hot Chips 30 (2018), Monday, August 20, 2018. Samsung's Exynos-M3 CPU Jeff Rupley, Samsung Electronics The Pixel Visual Core: Google's Fully ...
hotchipsvideos
HC31-S4: ML Training
Session 4, Hot Chips 31 (2019), Monday, August 19, 2019. A Scalable Unified Architecture for Neural Network Computing from Nano-level to High Performance ...
hotchipsvideos
Efficient, Heterogeneous, Parallel Processing: The Design of a Micropolygon Rendering Pipeline
Designing systems that are high-performance, power-efficient and easily programmable by non-experts is important at all levels of computing. Kayvon ...
UW Video
