Interview with Robert Schober, Editor-in-Chief, IEEE Transactions on Communications
Robert Schober on IEEE Transactions on Communications - interview by Elena Neira, Director of IEEE ComSoc Online Content.
IEEEComSoc
ما مقدار مشاركة العرب في صناعة التكنلوجيا الحديثة؟
ما مقدار مشاركة العرب في صناعة التكنلوجيا الحديثة؟
مدينة العلم
How to Prepare Research Paper for Publication in MS Word (Easy)
How to Setup Research Paper for Publication in MS Word... Facebook Page : https://www.facebook.com/MeMJTube Follow on twitter: ...
MJ Tube
MPPA + Autoware on eMCOS: Localization of Self-driving software on Embedded Many Cores
In test course with a real car, steering, accelerator, and brake are automatically controlled based on the results of KALRAY MPPA-256, a NoC-based embedded ...
OsakaUniv EmbIV
IEEE CIS "How to publish your research": Kay Chen Tan
Location: IEEE Congress on Evolutionary Computation 2013 (http://www.cec2013.org/) Panel Discussion "How to publish your research", June 21, 4-6pm Chair: ...
CIS Cyprus
Polysynchronous Clocking: Exploiting the 2 Skew Tolerance of Stochastic Circuits Spanish 1017
In the paradigm of stochastic computing, arithmetic functions are computed on randomized bit streams. The method 6 naturally and effectively tolerates very high ...
ieeeComputerSociety
TEDxESADE - Jonathan Wareham - Creativity Lost? Computers and The Crisis in Creative Work
Creativity Lost? Computers and the Crisis in Creative Work There is no need to exalt the new frontiers that information and communication technologies have ...
TEDx Talks
Deadlock Verification of Cache Coherence Protocols and Communication Fabrics
Cache coherence plays a major role in manycore systems. The verification of deadlocks is a challenge in particular, because deadlock freedom is an emerging ...
ieeeComputerSociety
Arb: Efficient Arbitrary-Precision 2 Midpoint-Radius Interval Arithmetic (0817)
Arb is a C library for arbitrary-precision interval arithmetic using the midpoint-radius representation, also known as ball 5 arithmetic. It supports real and complex ...
ieeeComputerSociety
Dapper: An Adaptive Manager for Large-Capacity Persistent Memory (Chinese)
In-memory computing has inspired researchers to consider integrating large-capacity persistent memory (PM) into the main memory subsystem. However ...
ieeeComputerSociety
Advanced Compressor Tree Synthesis for FPGAs Chinese
This work presents novel methods for the optimization of compressor trees for FPGAs as required in many arithmetic computations. As demonstrated in recent ...
ieeeComputerSociety
Revisiting Vulnerability Analysis in Modern Microprocessors
The notion of Architectural Vulnerability Factor (AVF) has been extensively used to evaluate various aspects of design robustness. While AVF has been a very ...
ieeeComputerSociety
2018 06 spanish
ieeeComputerSociety
A Compositional Approach for Verifying Protocols Running on On-Chip Networks (0718) Chinese
In modern many-core architectures, advanced on-chip networks provide the means of communication for the cores. This greatly complicates the design and ...
ieeeComputerSociety
SPACE: Semi-Partitioned CachE for Energy Efficient, Hard Real-Time Systems Chinese 0417
Multi-core processors are increasingly popular because they yield higher performance, but they also present new challenges for hard real-time systems in that ...
ieeeComputerSociety
Efficient Detection for Malicious and Random Errors in Additive Encrypted Computation Spanish (0118)
Although data confidentiality is the primary security objective in additive encrypted computation applications, such as the aggregation of encrypted votes in ...
ieeeComputerSociety
Analytical Processor Performance and Power Modeling Using Micro-Architecture...(1216)
Optimizing processors for (a) specific application(s) can substantially improve energy-efficiency. With the end of Dennard scaling, and the corresponding ...
ieeeComputerSociety
In Their Own Words: Hoang Le and Viktor K. Prasanna
From the IEEE Transactions on Computers' article, "Scalable Tree-Based Architectures for IPv4/v6 Lookup Using Prefix Partitioning." Memory efficiency and ...
ieeeComputerSociety
Contention-Aware Fair Scheduling for Asymmetric Single-ISA Multicore Systems (1218) Chinese
Asymmetric single-ISA multicore processors (AMPs), which integrate high-performance big cores and low-power small cores, were shown to deliver higher ...
ieeeComputerSociety
Hybrid Obfuscation to Protect Against Disclosure Attacks on Embedded Microprocessors Spanish (0318)
The risk of code reverse-engineering is particularly acute for embedded processors which often have limited available resources to protect program information.
ieeeComputerSociety
Advance Virtual Channel Reservation Chinese 0920
We present a smart communication service called Advance Virtual Channel Reservation (AVCR) to provide a highway to target packets, which can greatly ...
ieeeComputerSociety
Enhancing Energy Efficiency of Multimedia Applications in Heterogeneous Mobile...Chinese (1117)
Recent smart devices have adopted heterogeneous multi-core processors which have high-performance big cores and 6 low-power small cores. Unfortunately ...
ieeeComputerSociety
Taller Normas IEEE
Taller Normas IEEE.
Virtualización UniQuindío
CppCon 2016: Matt P. Dziubinski “Computer Architecture, C++, and High Performance"
http://CppCon.org — Presentation Slides, PDFs, Source Code and other presenter materials are available at: https://github.com/cppcon/cppcon2016 — With the ...
CppCon
Augmented Reading: Conclusions
In this video, author Paolo Montuschi summarizes the key concepts of the article "Augmented Reading: The Present and Future of Electronic Scientific ...
ieeeComputerSociety
Utilization Aware Power Management in Reliable and Aggressive Chip Multi Processors - March Chinese
With increasing transistor density on a single chip, processor design in the nanoscale era is hitting power and frequency walls. Due to these challenges, ...
ieeeComputerSociety
Analytical Fault Tolerance Assessment and Metrics for TSV-Based 3D Network-on-Chip-Chinese
Reliability is one of the most challenging problems in the context of three-dimensional network-on-chip (3D NoC) systems. Reliability analysis is prominent for ...
ieeeComputerSociety
Sustainable High-Performance Computing | Ozalp Babaoglu | Talks at Google
As technological progress brings us ever closer to achieving exaFLOP executions in High-Performance Computing (HPC) systems, new challenges emerge for ...
Talks at Google
Overview of the June 2015 TC featured paper "SpiNNaker—Programming Model" in Chinese
SpiNNaker is a multi-core computing engine, with a bespoke and specialised communication infrastructure that supports almost perfect scalability up to a hard ...
ieeeComputerSociety
Advanced Compressor Tree Synthesis for FPGAs Spanish
This work presents novel methods for the optimization of compressor trees for FPGAs as required in many arithmetic computations. As demonstrated in recent ...
ieeeComputerSociety
Static Instruction Scheduling for High Performance on Limited Hardware (0518)
Complex out-of-order (OoO) processors have been designed to overcome the restrictions of outstanding long-latency misses at the cost of increased energy ...
ieeeComputerSociety
High Performance Parallel Decimal Multipliers Using Hybrid BCD Codes Chinese (1217)
A parallel decimal multiplier with improved performance is proposed in this paper by exploiting the properties of three different binary coded decimal (BCD) ...
ieeeComputerSociety
Presidential Election Town Hall - 2019 IEEE Computer Society Candidates
In July 2917, for the first time, the IEEE Computer Society will held a live online town hall with its candidates for Society president. Members were invited to join ...
ieeeComputerSociety
Contention-Aware Fair Scheduling for Asymmetric Single-ISA Multicore Systems (1218) Spanish
Asymmetric single-ISA multicore processors (AMPs), which integrate high-performance big cores and low-power small cores, were shown to deliver higher ...
ieeeComputerSociety
Configurable XOR Hash Functions for Banked Scratchpad Memories in GPUs (0716 Chinese)
Scratchpad memories in GPU architectures are employed as software-controlled caches to increase the effective GPU memory bandwidth. Through the use of ...
ieeeComputerSociety
Cybersecurity and Privacy: State-of-Art, Challenges, and Opportunities
Event: Virtual Colloquium on Cyber Security (VCCS-2020) Speaker: Prof Shui Hui, School of Computer Science, University of Technology, Sydney, Australia.
IEEE AcSIR-CSIO
Bubble Budgeting: Throughput Optimization for Dynamic Workloads by Exploiting Dark Cores...(Chinese)
All the cores of a many-core chip cannot be active at the same time, due to reasons like low CPU utilization in server systems and limited power budget in dark ...
ieeeComputerSociety
Extending Unix Pipelines to Graphs
The Unix shell dgsh provides an expressive way to construct sophisticated and efficient non-linear pipelines. You can find the (open-access) full paper at ...
Diomidis Spinellis
Deadlock Verification of Cache Coherence Protocols and Communication Fabrics 0217 Spanish
Cache coherence plays a major role in manycore systems. The verification of deadlocks is a challenge in particular, because deadlock freedom is an emerging ...
ieeeComputerSociety
Everything You Need to Know About 5G
Millimeter waves, massive MIMO, full duplex, beamforming, and small cells are just a few of the technologies that could enable ultrafast 5G networks.
IEEE Spectrum
In Their Own Words: Naga Durga Prasad Avirneni, and Arun Somani
The threat of soft error induced system failure in computing systems has become more prominent, as we adopt ultra-deep submicron process technologies.
ieeeComputerSociety
